MemoryInterconnect
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chipyard
chipyard PublicForked from ucb-bar/chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
Scala
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- meca_mem_hotplug_test Public
- FireMarshal_mecamem_hotplug Public Forked from firesim/FireMarshal
A fork of firesim/FireMarshal to support hotplug function for MECA memory
- meca_pong_game Public
- meca_blkdev Public
- mecamem_manager Public
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